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Project Phase |
Description |
Status |
A0 |
Conversion of John Pultorak's
Block I AGC design (schematics only!) to Eagle CAD, with corrections and
small improvements. |
Ready now! |
A1 |
A clean restructuring of the
Block I design -- for example, with AGC, DSKY, and monitoring busses
separated into independent assemblies rather than being a part of one
large assembly. |
Preliminary data available. (See change
log.) |
B0 |
Block II AGC design (schematics
and printed-circuit board layout!) using 74xxx TTL logic. |
Possible |
B1 |
Size reduction of Block II
design, using surface-mount parts and FPGAs. |
Possible |
C0 |
Further, final size reduction of
the Block II design, with added Virtual AGC compatibility. (This
would mean, for example, that one of Dimitris's physical DSKY could be
used with a PC running Virtual AGC.) |
Possible |
The physical faceplate, work in progress! |
Cleaned-up stylized drawing from which measurements can be taken. A CorelDraw file is also available. |